FIG. 8 is a circuit diagram showing the construction of a 1-input, 2-output high frequency switching circuit 900, which performs a switch function by applying different d.c. potentials to two diodes using quarter-wavelength lines. The high frequency switching circuit 900 has a switch circuit 91 between an input terminal In and an output terminal Out-1 and a switch circuit 92 between the input terminal In and an output terminal Out-2. The switch circuits 91 and 92 are constructed with devices having the same characteristics. Each switch circuit 9i (i being 1 or 2) has capacitors C9i1 and C9i2 at its ends for cut offing direct currents. These are connected by a quarter-wavelength line SL9i. A positive or negative potential can be applied to the connection point between the quarter-wavelength line SL9i and the capacitor C9i2 via a resistor R9i, and the anode of a diode D9i is connected to the same connection point. The cathode of this diode D9i is grounded. Thus, for example, if a positive potential is applied to the anode of the diode D91 via the resistor R91 and a negative potential is applied to the anode of the diode D92 via the resistor R92, the switch circuit 91 turns off (acts as a cut off) because a current flows through the diode D91 and the diode becomes conductive, and the switch circuit 92 turns on because a current does not flow to the diode D92 and the diode becomes non-conductive. Thus, high frequency is not outputted to the output terminal Out-1 but band-filtered high frequency is outputted to the output terminal Out-2.
As relatively small band-pass filters made up of 2-port high frequency circuits, for example a ‘Tri-Plate Strip Line Filter’ (MWE2000 Microwave Workshop Digest, pp. 461-468 (2000)) and a ‘Microwave Satellite Communications Filter Using Multi-Layer Printed Circuit Board’ (NEC Technology Vol. 51 No. 4/1998, pp. 119-123) are generally known.
In the case of the ‘Tri-Plate Strip Line Filter,’ because it uses an LTCC (Low Temperature Co-Fired Ceramic), it must be mounted to another circuit board. Thus, its application to an organic substrate with a low dielectric constant is difficult. In particular, instability of quality due to variations in the thickness of the organic substrate becomes a problem. In the case of the ‘Microwave Satellite Communications Filter Using Multi-Layer Printed Circuit Board’ multiple quarter-wavelength lines are necessary, and the filter circuit necessarily becomes large. Also, when a switch is turned off by a diode being rendered conductive, because a current flows in the forward direction, a considerable amount of power is consumed. It is required to enlarge the range over which the input-output power characteristic is linear after the reverse bias is made a low potential, when a switch is turned on by a diode being turned off.
In this connection, the present inventors have invented and filed patent applications (Japanese Patent Application No. 2001-315243, Japanese Patent Application No. 2002-1910, Japanese Patent Application No. 2002-22689) for a filtering-type high frequency switching circuit having the construction shown in FIG. 9(c) as a typical construction. The construction of FIG. 9(c) will now be explained briefly.
FIG. 9(a) and FIG. 9(b) show circuits obtained by bisecting the circuit of FIG. 9(c), which is a circuit of a left-right symmetrical construction. In FIG. 9(a), an input/output terminal Port2 is provided and an inductance L is omitted. In FIG. 9(b), an input/output terminal Port2 is provided with an inductance L remaining. In FIG. 9(b), the inductance L can be replaced with a line without the following discussion being affected. In FIG. 9(a), a line A and a capacitor Ca are connected in series between a terminal Port1 and the ground. A line B and a capacitor Cb are connected in series between the terminal Port2 and the ground. Thus, the line A and the line B are coupled.
Now, the transmission characteristic from the terminal Portm to the terminal Portn in the circuit of FIG. 9(a) will be indicated as a complex number Smn, whose absolute value is not greater than 1. That is, S11 is the reflection characteristic of an input coming through the terminal Port1, and S12 is the transmittance characteristic of an input coming through the terminal Port1 and outputted through the terminal Port2. In the circuit of FIG. 9(a), ideally the reflection characteristic from either terminal is 0. It is desirable that there is no attenuation from either terminal toward the other. That is, ideally, S11=S22=0 and |S12|=|S21|=1 hold. This relationship is a necessary condition for, in a filter circuit with the object of obtaining a signal having a desired frequency, transmitting that signal without reflecting it and without loss.
Here, a characteristic matrix S of which row m column n is Smn is considered. It is desirable to have the characteristic vector (1, 1) as an even excitation and the characteristic vector (1, −1) as an odd excitation. The characteristic value of the matrix S with respect to the even excitation characteristic vector (1, 1) will be represented by λ1 and the characteristic value of the matrix S with respect to the odd excitation characteristic vector (1, −1) will be represented by λ2. First, a matrix P made by writing the characteristic vector (1, 1) and the characteristic vector (1, −1) as vertical vectors can be expressed as shown in the following Exp. (1).
                    P        =                              1                          2                                ⁡                      [                                                            1                                                  1                                                                              1                                                                      -                    1                                                                        ]                                              (        1        )            
Clearly, the matrix S can be developed as the following Exp. (2).
                    S        =                                            P              ⁡                              [                                                                                                    λ                        1                                                                                    0                                                                                                  0                                                                                      λ                        2                                                                                            ]                                      ⁢                          P                              -                1                                              =                                    1              2                        ⁡                          [                                                                                                                  λ                        1                                            +                                              λ                        2                                                                                                                                                λ                        1                                            -                                              λ                        2                                                                                                                                                                                λ                        1                                            -                                              λ                        2                                                                                                                                                λ                        1                                            +                                              λ                        2                                                                                                        ]                                                          (        2        )            
S11=S22=0, |S12|=|S21|=1 holds when the phases of the even excitation characteristic value λ1 and the odd excitation characteristic value λ2 are 180° apart. For example, S11=S22=0, |S12|=|S21|=1 holds when λ1=−λ2=±±1. However, λ1=−λ2=1 is the case of open in odd excitation and shorted in odd excitation, and shows a transmitting line, not a filter circuit. λ1=−λ2=−1 is the case of shorted in even excitation, open in odd excitation, and corresponds to a half-wave line and not, again, a filter circuit. Accordingly, for example λ1=−λ2=±j becomes the design condition (phase condition) for a filter circuit. For λ1=±1, ±j, a correspondence on a Smith chart is shown in FIG. 10(a).
When a pair of coupled lines (line A and line B) is added as shown in FIG. 9(a), a signal can be inputted through the terminal Port1 and outputted through the terminal Port2. At the same time, because a signal from the terminal Port2 is transmitted slightly to the terminal Port1, the impedance seen from the terminal Port2 falls inside the Smith chart. This is shown in FIG. 10(b) as the result of a simulation. The graph shows the reflection characteristic of when the input signal is 4 GHz to 8 GHz, and the black dot positioned in the approximate center of the curve shows the reflection characteristic with respect to a 5.8 GHz input signal.
On the other hand, the time a symmetrical circuit transmits a signal efficiently is when conjugate matching (impedance matching) has been carried out at the plane of symmetry. Because the high frequency circuit being studied is left-right symmetrical, this condition means the reflection coefficient Sa being a real number. That is, the characteristic impedances seen to the right and the left from the point a in FIG. 9(b) should show forward resistance. So, as shown in FIG. 9(b), an inductance component L or a line is added near the plane of symmetry of the filter circuit. FIG. 10(c) is a Smith chart showing the effect on the reflection characteristic of the reflection coefficient Sa in the circuit (the left half of the filter circuit) of FIG. 9(b). In this way, by using the action of an inductance component to shift the reflection characteristic to the horizontal axis (real number axis) of the Smith chart, it is possible to achieve conjugate matching of the left-right symmetrical filter circuit at the plane of symmetry. That is, by this means, it is possible to make a band-pass filter with high transmission efficiency.
FIG. 12 is a Smith chart showing respective examples of a simulation result relating to a circuit (FIG. 11(a)) corresponding to even excitation of the circuit of this FIG. 9(a) and a simulation result relating to a circuit (FIG. 11(b)) corresponding to odd excitation.
The marker m3 (at the bottom) in FIG. 12 shows the reflection coefficient (λ1) of the circuit at times of even excitation (FIG. 11(a)), and the marker m5 shows the reflection coefficient (λ2) of the circuit at times of odd excitation (FIG. 11(b)). The frequency of the simulated input signal was 5.8 GHz in each case. In this way, the imaginary number components of the reflection coefficients of even excitation and odd excitation respectively become −j and j, and the symmetrical 2-port circuit of FIG. 9(c) fulfils the phase condition discussed above. That is, it can be seen that the symmetrical 2-port circuit of FIG. 9(c) can form a band-pass filter. When a band-pass filter having 5.8 GHz as its center frequency is actually simulated, the results shown in FIGS. 13(a) and 13(b) are obtained. With respect to the frequency 5.8 GHz, the attenuation is small, at S21=−1.3 dB, the reflection is small, at S11=−41.9 dB, and the high frequency is outputted well.